-
Notifications
You must be signed in to change notification settings - Fork 60
Expand file tree
/
Copy pathi-stm32-flash.ads
More file actions
247 lines (225 loc) · 8.44 KB
/
i-stm32-flash.ads
File metadata and controls
247 lines (225 loc) · 8.44 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
--
-- Copyright (C) 2020, AdaCore
--
-- This spec has been automatically generated from STM32F401.svd
pragma Ada_2012;
pragma Style_Checks (Off);
with System;
package Interfaces.STM32.FLASH is
pragma Preelaborate;
pragma No_Elaboration_Code_All;
---------------
-- Registers --
---------------
subtype ACR_LATENCY_Field is Interfaces.STM32.UInt3;
subtype ACR_PRFTEN_Field is Interfaces.STM32.Bit;
subtype ACR_ICEN_Field is Interfaces.STM32.Bit;
subtype ACR_DCEN_Field is Interfaces.STM32.Bit;
subtype ACR_ICRST_Field is Interfaces.STM32.Bit;
subtype ACR_DCRST_Field is Interfaces.STM32.Bit;
-- Flash access control register
type ACR_Register is record
-- Latency
LATENCY : ACR_LATENCY_Field := 16#0#;
-- unspecified
Reserved_3_7 : Interfaces.STM32.UInt5 := 16#0#;
-- Prefetch enable
PRFTEN : ACR_PRFTEN_Field := 16#0#;
-- Instruction cache enable
ICEN : ACR_ICEN_Field := 16#0#;
-- Data cache enable
DCEN : ACR_DCEN_Field := 16#0#;
-- Write-only. Instruction cache reset
ICRST : ACR_ICRST_Field := 16#0#;
-- Data cache reset
DCRST : ACR_DCRST_Field := 16#0#;
-- unspecified
Reserved_13_31 : Interfaces.STM32.UInt19 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for ACR_Register use record
LATENCY at 0 range 0 .. 2;
Reserved_3_7 at 0 range 3 .. 7;
PRFTEN at 0 range 8 .. 8;
ICEN at 0 range 9 .. 9;
DCEN at 0 range 10 .. 10;
ICRST at 0 range 11 .. 11;
DCRST at 0 range 12 .. 12;
Reserved_13_31 at 0 range 13 .. 31;
end record;
subtype SR_EOP_Field is Interfaces.STM32.Bit;
subtype SR_OPERR_Field is Interfaces.STM32.Bit;
subtype SR_WRPERR_Field is Interfaces.STM32.Bit;
subtype SR_PGAERR_Field is Interfaces.STM32.Bit;
subtype SR_PGPERR_Field is Interfaces.STM32.Bit;
subtype SR_PGSERR_Field is Interfaces.STM32.Bit;
subtype SR_BSY_Field is Interfaces.STM32.Bit;
-- Status register
type SR_Register is record
-- End of operation
EOP : SR_EOP_Field := 16#0#;
-- Operation error
OPERR : SR_OPERR_Field := 16#0#;
-- unspecified
Reserved_2_3 : Interfaces.STM32.UInt2 := 16#0#;
-- Write protection error
WRPERR : SR_WRPERR_Field := 16#0#;
-- Programming alignment error
PGAERR : SR_PGAERR_Field := 16#0#;
-- Programming parallelism error
PGPERR : SR_PGPERR_Field := 16#0#;
-- Programming sequence error
PGSERR : SR_PGSERR_Field := 16#0#;
-- unspecified
Reserved_8_15 : Interfaces.STM32.Byte := 16#0#;
-- Read-only. Busy
BSY : SR_BSY_Field := 16#0#;
-- unspecified
Reserved_17_31 : Interfaces.STM32.UInt15 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for SR_Register use record
EOP at 0 range 0 .. 0;
OPERR at 0 range 1 .. 1;
Reserved_2_3 at 0 range 2 .. 3;
WRPERR at 0 range 4 .. 4;
PGAERR at 0 range 5 .. 5;
PGPERR at 0 range 6 .. 6;
PGSERR at 0 range 7 .. 7;
Reserved_8_15 at 0 range 8 .. 15;
BSY at 0 range 16 .. 16;
Reserved_17_31 at 0 range 17 .. 31;
end record;
subtype CR_PG_Field is Interfaces.STM32.Bit;
subtype CR_SER_Field is Interfaces.STM32.Bit;
subtype CR_MER_Field is Interfaces.STM32.Bit;
subtype CR_SNB_Field is Interfaces.STM32.UInt4;
subtype CR_PSIZE_Field is Interfaces.STM32.UInt2;
subtype CR_STRT_Field is Interfaces.STM32.Bit;
subtype CR_EOPIE_Field is Interfaces.STM32.Bit;
subtype CR_ERRIE_Field is Interfaces.STM32.Bit;
subtype CR_LOCK_Field is Interfaces.STM32.Bit;
-- Control register
type CR_Register is record
-- Programming
PG : CR_PG_Field := 16#0#;
-- Sector Erase
SER : CR_SER_Field := 16#0#;
-- Mass Erase
MER : CR_MER_Field := 16#0#;
-- Sector number
SNB : CR_SNB_Field := 16#0#;
-- unspecified
Reserved_7_7 : Interfaces.STM32.Bit := 16#0#;
-- Program size
PSIZE : CR_PSIZE_Field := 16#0#;
-- unspecified
Reserved_10_15 : Interfaces.STM32.UInt6 := 16#0#;
-- Start
STRT : CR_STRT_Field := 16#0#;
-- unspecified
Reserved_17_23 : Interfaces.STM32.UInt7 := 16#0#;
-- End of operation interrupt enable
EOPIE : CR_EOPIE_Field := 16#0#;
-- Error interrupt enable
ERRIE : CR_ERRIE_Field := 16#0#;
-- unspecified
Reserved_26_30 : Interfaces.STM32.UInt5 := 16#0#;
-- Lock
LOCK : CR_LOCK_Field := 16#1#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for CR_Register use record
PG at 0 range 0 .. 0;
SER at 0 range 1 .. 1;
MER at 0 range 2 .. 2;
SNB at 0 range 3 .. 6;
Reserved_7_7 at 0 range 7 .. 7;
PSIZE at 0 range 8 .. 9;
Reserved_10_15 at 0 range 10 .. 15;
STRT at 0 range 16 .. 16;
Reserved_17_23 at 0 range 17 .. 23;
EOPIE at 0 range 24 .. 24;
ERRIE at 0 range 25 .. 25;
Reserved_26_30 at 0 range 26 .. 30;
LOCK at 0 range 31 .. 31;
end record;
subtype OPTCR_OPTLOCK_Field is Interfaces.STM32.Bit;
subtype OPTCR_OPTSTRT_Field is Interfaces.STM32.Bit;
subtype OPTCR_BOR_LEV_Field is Interfaces.STM32.UInt2;
subtype OPTCR_WDG_SW_Field is Interfaces.STM32.Bit;
subtype OPTCR_nRST_STOP_Field is Interfaces.STM32.Bit;
subtype OPTCR_nRST_STDBY_Field is Interfaces.STM32.Bit;
subtype OPTCR_RDP_Field is Interfaces.STM32.Byte;
subtype OPTCR_nWRP_Field is Interfaces.STM32.UInt12;
-- Flash option control register
type OPTCR_Register is record
-- Option lock
OPTLOCK : OPTCR_OPTLOCK_Field := 16#0#;
-- Option start
OPTSTRT : OPTCR_OPTSTRT_Field := 16#0#;
-- BOR reset Level
BOR_LEV : OPTCR_BOR_LEV_Field := 16#1#;
-- unspecified
Reserved_4_4 : Interfaces.STM32.Bit := 16#1#;
-- WDG_SW User option bytes
WDG_SW : OPTCR_WDG_SW_Field := 16#0#;
-- nRST_STOP User option bytes
nRST_STOP : OPTCR_nRST_STOP_Field := 16#0#;
-- nRST_STDBY User option bytes
nRST_STDBY : OPTCR_nRST_STDBY_Field := 16#0#;
-- Read protect
RDP : OPTCR_RDP_Field := 16#0#;
-- Not write protect
nWRP : OPTCR_nWRP_Field := 16#0#;
-- unspecified
Reserved_28_31 : Interfaces.STM32.UInt4 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for OPTCR_Register use record
OPTLOCK at 0 range 0 .. 0;
OPTSTRT at 0 range 1 .. 1;
BOR_LEV at 0 range 2 .. 3;
Reserved_4_4 at 0 range 4 .. 4;
WDG_SW at 0 range 5 .. 5;
nRST_STOP at 0 range 6 .. 6;
nRST_STDBY at 0 range 7 .. 7;
RDP at 0 range 8 .. 15;
nWRP at 0 range 16 .. 27;
Reserved_28_31 at 0 range 28 .. 31;
end record;
-----------------
-- Peripherals --
-----------------
-- FLASH
type FLASH_Peripheral is record
-- Flash access control register
ACR : aliased ACR_Register;
-- Flash key register
KEYR : aliased Interfaces.STM32.UInt32;
-- Flash option key register
OPTKEYR : aliased Interfaces.STM32.UInt32;
-- Status register
SR : aliased SR_Register;
-- Control register
CR : aliased CR_Register;
-- Flash option control register
OPTCR : aliased OPTCR_Register;
end record
with Volatile;
for FLASH_Peripheral use record
ACR at 16#0# range 0 .. 31;
KEYR at 16#4# range 0 .. 31;
OPTKEYR at 16#8# range 0 .. 31;
SR at 16#C# range 0 .. 31;
CR at 16#10# range 0 .. 31;
OPTCR at 16#14# range 0 .. 31;
end record;
-- FLASH
FLASH_Periph : aliased FLASH_Peripheral
with Import, Address => FLASH_Base;
end Interfaces.STM32.FLASH;