Why the PPU OAM access takes 21 cycles (84 dots) instead of 20 (80 dots) ?

[itytophile]

Hi. First of all, thanks for this emulator and your test suite. I am writing an emulator on my own and this is really helping me out.

I am trying to pass the ppu/intr_2_mode0_timing. However, my emulator changes mode too fast and the B register misses an increment.
When studying mooneye-gb, I was surprised by this line:

const ACCESS_OAM_CYCLES: isize = 21;

Pandocs and Sameboy say 80 dots. Maybe the LCD Status register is not perfectly synchronised with the actual mode? I'll try to study SameBoy code to know what's happening.

[itytophile]

After a break, found a comment about this problem in SameBoy https://github.com/LIJI32/SameBoy/blob/3000269e73a2043fd121ec39d866de99465db178/Core/display.c#L1778

The OAM STAT interrupt occurs 1 T-cycle before STAT actually changes, except on line 0. PPU glitch?