Fixed FINAL_PINS

Author: JadenSimon

FINAL_PINS.csv

@@ -14,45 +14,47 @@
 
 # Quartus Prime Version 17.1.0 Build 590 10/25/2017 SJ Lite Edition
 # File: C:\intelFPGA_lite\17.1\FINAL\FINAL_PINS.csv
-# Generated on: Wed Dec 05 23:42:08 2018
+# Generated on: Fri Dec 07 11:05:49 2018
 
 # Note: The column header names should not be changed if you wish to import this .csv file into the Quartus Prime software.
 
-To,Direction,Location,I/O Bank,VREF Group,I/O Standard,Reserved,Current Strength,Slew Rate,Differential Pair,Transceiver Analog Settings Protocol,VCCR_GXB/VCCT_GXB Voltage,Transceiver I/O Pin Termination,Transceiver Dedicated Refclk Pin Termination,Transmitter Common Mode Driver Voltage,Transmitter Slew Rate Control,Transmitter Differential Output Voltage,Receiver Buffer Common Mode Voltage,Strict Preservation
-blue[4],Output,PIN_J14,8A,B8A_N0,,,,,,,,,,,,,,
-blue[3],Output,PIN_G15,8A,B8A_N0,,,,,,,,,,,,,,
-blue[2],Output,PIN_F15,8A,B8A_N0,,,,,,,,,,,,,,
-blue[1],Output,PIN_H14,8A,B8A_N0,,,,,,,,,,,,,,
-blue[0],Output,PIN_F14,8A,B8A_N0,,,,,,,,,,,,,,
-clk,Input,PIN_AF14,3B,B3B_N0,,,,,,,,,,,,,,
-green[4],Output,PIN_E11,8A,B8A_N0,,,,,,,,,,,,,,
-green[3],Output,PIN_F11,8A,B8A_N0,,,,,,,,,,,,,,
-green[2],Output,PIN_G12,8A,B8A_N0,,,,,,,,,,,,,,
-green[1],Output,PIN_G11,8A,B8A_N0,,,,,,,,,,,,,,
-green[0],Output,PIN_G10,8A,B8A_N0,,,,,,,,,,,,,,
-hSync,Output,PIN_B11,8A,B8A_N0,,,,,,,,,,,,,,
-red[4],Output,PIN_F13,8A,B8A_N0,,,,,,,,,,,,,,
-red[3],Output,PIN_E12,8A,B8A_N0,,,,,,,,,,,,,,
-red[2],Output,PIN_D12,8A,B8A_N0,,,,,,,,,,,,,,
-red[1],Output,PIN_C12,8A,B8A_N0,,,,,,,,,,,,,,
-red[0],Output,PIN_B12,8A,B8A_N0,,,,,,,,,,,,,,
-reset,Input,PIN_AA14,3B,B3B_N0,,,,,,,,,,,,,,
-snes1_fake_data[4],Input,PIN_AB12,3A,B3A_N0,,,,,,,,,,,,,,
-snes1_fake_data[3],Input,PIN_AC12,3A,B3A_N0,,,,,,,,,,,,,,
-snes1_fake_data[2],Input,PIN_AF9,3A,B3A_N0,,,,,,,,,,,,,,
-snes1_fake_data[1],Input,PIN_AF10,3A,B3A_N0,,,,,,,,,,,,,,
-snes1_fake_data[0],Input,PIN_AD11,3A,B3A_N0,,,,,,,,,,,,,,
-snes1_fake_start,Input,PIN_AA15,3B,B3B_N0,,,,,,,,,,,,,,
-snes1_in,Input,PIN_AD17,4A,B4A_N0,,,,,,,,,,,,,,
-snes1_latch,Output,PIN_Y17,4A,B4A_N0,,,,,,,,,,,,,,
-snes1_slow_clk,Output,PIN_AC18,4A,B4A_N0,,,,,,,,,,,,,,
-snes2_fake_data[4],Input,PIN_AD12,3A,B3A_N0,,,,,,,,,,,,,,
-snes2_fake_data[3],Input,PIN_AE11,3A,B3A_N0,,,,,,,,,,,,,,
-snes2_fake_data[2],Input,PIN_AC9,3A,B3A_N0,,,,,,,,,,,,,,
-snes2_fake_data[1],Input,PIN_AD10,3A,B3A_N0,,,,,,,,,,,,,,
-snes2_fake_data[0],Input,PIN_AE12,3A,B3A_N0,,,,,,,,,,,,,,
-snes2_in,Input,PIN_AB21,4A,B4A_N0,,,,,,,,,,,,,,
-snes2_latch,Output,PIN_AA21,4A,B4A_N0,,,,,,,,,,,,,,
-snes2_slow_clk,Output,PIN_AB17,4A,B4A_N0,,,,,,,,,,,,,,
-vSync,Output,PIN_D11,8A,B8A_N0,,,,,,,,,,,,,,
-vga_slow_clk,Output,PIN_A11,8A,B8A_N0,,,,,,,,,,,,,,
+To,Direction,Location,I/O Bank,VREF Group,Fitter Location,I/O Standard,Reserved,Current Strength,Slew Rate,Differential Pair,Transceiver Analog Settings Protocol,VCCR_GXB/VCCT_GXB Voltage,Transceiver I/O Pin Termination,Transceiver Dedicated Refclk Pin Termination,Transmitter Common Mode Driver Voltage,Transmitter Slew Rate Control,Transmitter Differential Output Voltage,Receiver Buffer Common Mode Voltage,Strict Preservation
+blue[4],Output,PIN_J14,8A,B8A_N0,PIN_J14,2.5 V,,,,,,,,,,,,,
+blue[3],Output,PIN_G15,8A,B8A_N0,PIN_G15,2.5 V,,,,,,,,,,,,,
+blue[2],Output,PIN_F15,8A,B8A_N0,PIN_F15,2.5 V,,,,,,,,,,,,,
+blue[1],Output,PIN_H14,8A,B8A_N0,PIN_H14,2.5 V,,,,,,,,,,,,,
+blue[0],Output,PIN_F14,8A,B8A_N0,PIN_F14,2.5 V,,,,,,,,,,,,,
+clk,Input,PIN_AF14,3B,B3B_N0,PIN_AF14,2.5 V,,,,,,,,,,,,,
+fake_left,Input,PIN_Y16,3B,B3B_N0,PIN_Y16,2.5 V,,,,,,,,,,,,,
+fake_right,Input,PIN_W15,3B,B3B_N0,PIN_W15,2.5 V,,,,,,,,,,,,,
+green[4],Output,PIN_E11,8A,B8A_N0,PIN_E11,2.5 V,,,,,,,,,,,,,
+green[3],Output,PIN_F11,8A,B8A_N0,PIN_F11,2.5 V,,,,,,,,,,,,,
+green[2],Output,PIN_G12,8A,B8A_N0,PIN_G12,2.5 V,,,,,,,,,,,,,
+green[1],Output,PIN_G11,8A,B8A_N0,PIN_G11,2.5 V,,,,,,,,,,,,,
+green[0],Output,PIN_G10,8A,B8A_N0,PIN_G10,2.5 V,,,,,,,,,,,,,
+hSync,Output,PIN_B11,8A,B8A_N0,PIN_B11,2.5 V,,,,,,,,,,,,,
+red[4],Output,PIN_F13,8A,B8A_N0,PIN_F13,2.5 V,,,,,,,,,,,,,
+red[3],Output,PIN_E12,8A,B8A_N0,PIN_E12,2.5 V,,,,,,,,,,,,,
+red[2],Output,PIN_D12,8A,B8A_N0,PIN_D12,2.5 V,,,,,,,,,,,,,
+red[1],Output,PIN_C12,8A,B8A_N0,PIN_C12,2.5 V,,,,,,,,,,,,,
+red[0],Output,PIN_B12,8A,B8A_N0,PIN_B12,2.5 V,,,,,,,,,,,,,
+reset,Input,PIN_AA14,3B,B3B_N0,PIN_AA14,2.5 V,,,,,,,,,,,,,
+snes1_fake_data[4],Input,PIN_AB12,3A,B3A_N0,PIN_AB12,2.5 V,,,,,,,,,,,,,
+snes1_fake_data[3],Input,PIN_AC12,3A,B3A_N0,PIN_AC12,2.5 V,,,,,,,,,,,,,
+snes1_fake_data[2],Input,PIN_AF9,3A,B3A_N0,PIN_AF9,2.5 V,,,,,,,,,,,,,
+snes1_fake_data[1],Input,PIN_AF10,3A,B3A_N0,PIN_AF10,2.5 V,,,,,,,,,,,,,
+snes1_fake_data[0],Input,PIN_AD11,3A,B3A_N0,PIN_AD11,2.5 V,,,,,,,,,,,,,
+snes1_fake_start,Input,PIN_AA15,3B,B3B_N0,PIN_AA15,2.5 V,,,,,,,,,,,,,
+snes1_in,Input,PIN_AD17,4A,B4A_N0,PIN_AD17,2.5 V,,,,,,,,,,,,,
+snes1_latch,Output,PIN_Y17,4A,B4A_N0,PIN_Y17,2.5 V,,,,,,,,,,,,,
+snes1_slow_clk,Output,PIN_AC18,4A,B4A_N0,PIN_AC18,2.5 V,,,,,,,,,,,,,
+snes2_fake_data[4],Input,PIN_AD12,3A,B3A_N0,PIN_AD12,2.5 V,,,,,,,,,,,,,
+snes2_fake_data[3],Input,PIN_AE11,3A,B3A_N0,PIN_AE11,2.5 V,,,,,,,,,,,,,
+snes2_fake_data[2],Input,PIN_AC9,3A,B3A_N0,PIN_AC9,2.5 V,,,,,,,,,,,,,
+snes2_fake_data[1],Input,PIN_AD10,3A,B3A_N0,PIN_AD10,2.5 V,,,,,,,,,,,,,
+snes2_fake_data[0],Input,PIN_AE12,3A,B3A_N0,PIN_AE12,2.5 V,,,,,,,,,,,,,
+snes2_in,Input,PIN_AB21,4A,B4A_N0,PIN_AB21,2.5 V,,,,,,,,,,,,,
+snes2_latch,Output,PIN_AA21,4A,B4A_N0,PIN_AA21,2.5 V,,,,,,,,,,,,,
+snes2_slow_clk,Output,PIN_AB17,4A,B4A_N0,PIN_AB17,2.5 V,,,,,,,,,,,,,
+vSync,Output,PIN_D11,8A,B8A_N0,PIN_D11,2.5 V,,,,,,,,,,,,,
+vga_slow_clk,Output,PIN_A11,8A,B8A_N0,PIN_A11,2.5 V,,,,,,,,,,,,,