GIT: Merge branch 'development'

Author: laborleben

.gitignore

@@ -104,6 +104,14 @@ firmware/mmc3_m26_eth/vivado/*
 firmware/mmc3_beast_eth/vivado/*
 !firmware/mmc3_beast_eth/vivado/*.xpr
 
+# MMC3 8chip firmware
+firmware/mmc3_8chip_eth/vivado/*
+!firmware/mmc3_8chip_eth/vivado/*.xpr
+
+# MMC3 8chip with multi TX firmware
+firmware/mmc3_8chip_multi_tx_eth/vivado/*
+!firmware/mmc3_8chip_multi_tx_eth/vivado/*.xpr
+
 # Simulation output
 firmware/mio/cosim/sim_build
 firmware/mio/cosim/sim_build.zip

README.md

@@ -6,22 +6,25 @@ pyBAR - Bonn ATLAS Readout in Python
 PyBAR is a versatile readout and test system for the ATLAS FEI4(A/B) pixel readout chip. It uses the [basil](https://github.com/SiLab-Bonn/basil) framework to access the readout hardware.
 PyBAR's FPGA firmware and host software includes support for different hardware platforms.
 
-PyBAR is *not only* targeting experienced users and developers. The easy-to-use scripts allow a quick setup and start. PyBAR is a very flexible readout and test system and provides the capability to conduct tests and characterization measurements of individual chips.
+PyBAR is *not only* targeting experienced users and developers. The easy-to-use scripts allow a quick setup and start. PyBAR is a very flexible readout and test system and provides the capability to conduct tests and characterization measurements of individual chips, and tests of large-scale detectors with multiple multi-chip modules and multiple readout boards.
 
 The features of the FPGA firmware in a nutshell:
 - supported readout boards:
   any hardware that is supported by basil (e.g., MIO2, MIO3, and MMC3)
 - supported adapter cards:
   Single Chip Adapter Card, Burn-in Card (Quad Module Adapter Card) and the General Purpose Analog Card (GPAC)
-- readout of single chip modules
+- readout of multiple readout boards
+- readout of multiple multi-chip modules (e.g., single, dual, quad module, and any combination of those)
+- simultaneous readout (e.g., data taking with external trigger, individual tuning of chips)
 - continuous data taking
-- automatic data to clock phase alignment
+- individual and automatic data to clock phase alignment on each channel
 - full support of EUDAQ TLU and availability of EUDAQ Producer
 
 The features of the host software in Python:
 - no GUI
 - support for Windows, Linux and macOS
 - scan/tuning/calibration algorithms are implemented in stand-alone scripts
+- scripts are implemented for operating single chips but are working with multi-chip configurations as well
 - fast development and implementation of new scan/tuning/calibration algorithms
 - configuration files are human readable (compatible to RCE/HSIO)
 - full control over FEI4 command generation, sending any arbitrary bit stream and configuration sequence to the FEI4
@@ -33,7 +36,7 @@ The features of the host software in Python:
 
 The following packages are required for pyBAR's core functionality:
   ```
-  basil_daq bitarray cython matplotlib numba numpy pixel_clusterizer progressbar-latest pytables pyyaml scipy
+  basil_daq bitarray contextlib2 cython matplotlib numba numpy pixel_clusterizer progressbar-latest pytables pyyaml scipy
   ```
 
 For full functionality, the following additional packages are required:
@@ -43,7 +46,7 @@ For full functionality, the following additional packages are required:
 
 Run the **following commands** to install the packages:
   ```
-  conda install python=2.7 bitarray cython ipython matplotlib mock nose numba numpy pyserial pytables pyyaml pyzmq scipy sphinx
+  conda install python=2.7 bitarray contextlib2 cython ipython matplotlib mock nose numba numpy pyserial pytables pyyaml pyzmq scipy sphinx
 
   pip install progressbar-latest pyvisa pyvisa-py git+https://github.com/pyqtgraph/pyqtgraph.git@pyqtgraph-0.10.0
   ```
@@ -68,7 +71,7 @@ On Windows, the `pywin32` package is required:
   pip install 'pixel_clusterizer>=3.1,<3.2'
   ```
 
-To enable support for USB devices (MIO, MIO3 and MMC3), the following additional packages are required:
+To enable support for USB devices (MIO2), the following additional packages are required:
 - [PyUSB](https://github.com/walac/pyusb) (>=1.0.0rc1):
   ```
   pip install pyusb

VERSION

@@ -1 +1 @@
-2.1.0
+3.0.0

examples/example_run_manager/example_run_manager.py

@@ -9,7 +9,7 @@
     # The initial FE configuration will be created during the first run.
     #
     # (from configuration.yaml)
-    # fe_flavor : fei4a
+    # flavor : fei4a
     # ...
     #
     # Initializing the run manager:
@@ -18,17 +18,17 @@
     # During the first run, an module data directory relative to the configuration.yaml file will be created.
     # If configuration.yaml is placed inside /host/pybar/ the module data will be stored inside /host/pybar/<module_id> (where <module_id> is defined inside configuration.yaml).
     #
-    # If fe_configuration inside configuration.yaml is not given, the latest valid FE configuration file will be taken (the file with the highest run number and run status 'FINISHED').
+    # If configuration inside configuration.yaml is not given, the latest valid FE configuration file will be taken (the file with the highest run number and run status 'FINISHED').
     #
     # (from configuration.yaml)
-    # fe_configuration:
+    # configuration:
     # ...
     #
-    # If no configuration file exists, a initial configuration will be create according to fe_flavor.
+    # If no configuration file exists, a initial configuration will be create according to flavor.
     # To load a specific configuration file, a path to FE configuration file or a run number (e.g. 5) can be given:
     #
     # (from configuration.yaml)
-    # fe_configuration: 1
+    # configuration: 1
     # ...
     #
     # This will retain the configuration for the following scans.

firmware/lx9/src/top.v

@@ -266,7 +266,7 @@ module top (
     .BUS_DATA(BUS_DATA)
   );
 
-    //MODULE ADREESSES
+    //MODULE ADDRESSES
 
     localparam CMD_BASEADDR = 32'h0000;
     localparam CMD_HIGHADDR = 32'h8000-1;
@@ -343,7 +343,7 @@ module top (
             .FIFO_EMPTY(FE_FIFO_EMPTY[i]),
             .FIFO_DATA(FE_FIFO_DATA[i]),
 
-            .RX_FIFO_FULL(RX_FIFO_FULL[i]),
+            .RX_FIFO_FULL(RX_FIFO_FULL[i]),
             .RX_ENABLED(),
 
             .BUS_CLK(BUS_CLK),

firmware/mio/cosim/sim.yaml

@@ -19,23 +19,23 @@ hw_drivers:
 #    interface : USB
 #    base_addr : 0x0
 
-  - name      : CH4
+  - name      : DATA_CH4
     type      : fei4_rx
     interface : USB
     base_addr : 0x18300
 
 # Uncomment for FEI4QuadModuleAdapterCard
-  - name      : CH3
+  - name      : DATA_CH3
     type      : fei4_rx
     interface : USB
     base_addr : 0x18400
-    
-  - name      : CH2
+
+  - name      : DATA_CH2
     type      : fei4_rx
     interface : USB
     base_addr : 0x18500
-    
-  - name      : CH1
+
+  - name      : DATA_CH1
     type      : fei4_rx
     interface : USB
     base_addr : 0x18600
@@ -89,7 +89,7 @@ hw_drivers:
     base_addr : 0x18900
 
 user_drivers:
-    
+
 registers:
   - name        : ENABLE_CHANNEL
     type        : StdRegister
@@ -102,16 +102,16 @@ registers:
       - name    : TLU
         size    : 1
         offset  : 4
-      - name    : CH4
+      - name    : DATA_CH4
         size    : 1
         offset  : 3
-      - name    : CH3
+      - name    : DATA_CH3
         size    : 1
         offset  : 2
-      - name    : CH2
+      - name    : DATA_CH2
         size    : 1
         offset  : 1
-      - name    : CH1
+      - name    : DATA_CH1
         size    : 1
         offset  : 0
 

firmware/mio/cosim/sim_test.py

@@ -22,10 +22,10 @@
 dut['POWER_SCC'].write()
 
 # enabling readout
-dut['rx']['CH1'] = 1
-dut['rx']['CH2'] = 1
-dut['rx']['CH3'] = 1
-dut['rx']['CH4'] = 1
+dut['rx']['DATA_CH1'] = 1
+dut['rx']['DATA_CH2'] = 1
+dut['rx']['DATA_CH3'] = 1
+dut['rx']['DATA_CH4'] = 1
 dut['rx']['TLU'] = 1
 dut['rx']['TDC'] = 1
 dut['rx'].write()
@@ -45,7 +45,8 @@ def cmd(data, size):
 cmd([0xB1, 0x00], 9)  # ECR
 cmd([0xB4, 0x50, 0x0E], 23)  # conf mode
 
-dut['rx_1']['RESET']  # let rx sync
+dut['rx_1']['RX_RESET']  # RX sync
+dut['rx_1']['ENABLE_RX']  # enable RX
 
 cmd([0xB4, 0x08, 0x00], 23)  # readbck a register
 

firmware/mio/src/top.v

@@ -201,10 +201,11 @@ assign TRIGGER_ACKNOWLEDGE_FLAG = CMD_READY & ~CMD_READY_FF;
 
 wire CMD_START_FLAG; // sending FE command triggered by external devices
 //reg CMD_CAL; // when CAL command is send
+wire TRIGGER_ENABLED, TLU_ENABLED;
 
 // LEMO Tx
 assign TX[0] = TLU_CLOCK;
-assign TX[1] = EXT_TRIGGER_ENABLE ? TLU_BUSY : ~CMD_READY;
+assign TX[1] = TLU_ENABLED ? TLU_BUSY : ~CMD_READY;
 assign TX[2] = RJ45_TRIGGER;
 
 // ------- RESRT/CLOCK  ------- //
@@ -307,7 +308,7 @@ clock_divider #(
     .CLOCK(CLK_3HZ)
 );
 
-// -------  MODULE ADREESSES  ------- //
+// -------  MODULE ADDRESSES  ------- //
 localparam CMD_BASEADDR = 16'h0000;
 localparam CMD_HIGHADDR = 16'h8000-1;
 
@@ -511,7 +512,7 @@ tdc_s3 #(
     .BASEADDR(TDC_BASEADDR),
     .HIGHADDR(TDC_HIGHADDR),
     .CLKDV(4),
-    .DATA_IDENTIFIER(4'b0100), // one-hot
+    .DATA_IDENTIFIER(4'b0100),
     .FAST_TDC(1),
     .FAST_TRIGGER(1)
 ) i_tdc (
@@ -586,11 +587,15 @@ tlu_controller #(
 
     .FIFO_PREEMPT_REQ(TRIGGER_FIFO_PEEMPT_REQ),
 
+    .TRIGGER_ENABLED(TRIGGER_ENABLED),
+    .TRIGGER_SELECTED(),
+    .TLU_ENABLED(TLU_ENABLED),
+
     .TRIGGER({3'b0, CCPD_TDC_FROM_TDC, TDC_IN_FROM_TDC, MULTI_PURPOSE, LEMO_TRIGGER_FROM_TDC, MONHIT}),
     .TRIGGER_VETO({6'b0, MULTI_PURPOSE, FIFO_FULL}),
 
     .EXT_TRIGGER_ENABLE(EXT_TRIGGER_ENABLE),
-    .TRIGGER_ACKNOWLEDGE(EXT_TRIGGER_ENABLE == 1'b0 ? TRIGGER_ACCEPTED_FLAG : TRIGGER_ACKNOWLEDGE_FLAG),
+    .TRIGGER_ACKNOWLEDGE(TRIGGER_ACKNOWLEDGE_FLAG),
     .TRIGGER_ACCEPTED_FLAG(TRIGGER_ACCEPTED_FLAG),
 
     .TLU_TRIGGER(RJ45_TRIGGER),
@@ -663,11 +668,15 @@ tlu_controller #(
 
     .FIFO_PREEMPT_REQ(TRIGGER_FIFO_PEEMPT_REQ),
 
+    .TRIGGER_ENABLED(TRIGGER_ENABLED),
+    .TRIGGER_SELECTED(),
+    .TLU_ENABLED(TLU_ENABLED),
+
     .TRIGGER({4'b0, TDC_IN_FROM_TDC, MULTI_PURPOSE, LEMO_TRIGGER_FROM_TDC, MONHIT}),
     .TRIGGER_VETO({6'b0, MULTI_PURPOSE, FIFO_FULL}),
 
     .EXT_TRIGGER_ENABLE(EXT_TRIGGER_ENABLE),
-    .TRIGGER_ACKNOWLEDGE(EXT_TRIGGER_ENABLE == 1'b0 ? TRIGGER_ACCEPTED_FLAG : TRIGGER_ACKNOWLEDGE_FLAG),
+    .TRIGGER_ACKNOWLEDGE(TRIGGER_ACKNOWLEDGE_FLAG),
     .TRIGGER_ACCEPTED_FLAG(TRIGGER_ACCEPTED_FLAG),
 
     .TLU_TRIGGER(RJ45_TRIGGER),

firmware/mio3/src/KX7_IF_Test_Top.v

@@ -183,7 +183,7 @@ PLLE2_BASE #(
  .I(clk16mhz_pll)      // Clock buffer input
  );
 
-// -------  MODULE ADREESSES  ------- //
+// -------  MODULE ADDRESSES  ------- //
  localparam CMD_BASEADDR = 32'h0000;
  localparam CMD_HIGHADDR = 32'h8000-1;
 

firmware/mio3/src/mmc3_top.v

@@ -182,7 +182,7 @@ PLLE2_BASE #(
  .I(clk16mhz_pll)      // Clock buffer input
  );
 
-// -------  MODULE ADREESSES  ------- //
+// -------  MODULE ADDRESSES  ------- //
  localparam CMD_BASEADDR = 32'h0000;
  localparam CMD_HIGHADDR = 32'h1000-1;