Questions related to the paper

[tensorzip]

Dear Developer,
I have recently been conducting research on the paper you published. I would like to inquire about two aspects: first, how does the accuracy of Work A (Gate Delay Estimation with Library Compatible Current Source Models and Effective Capacitance) compare with that of Work B (Leveraging Machine Learning for Gate-level Timing Estimation Using Current Source Models and Effective Capacitance)? Second, if machine learning is not adopted in Work B, will it lead to a significant drop in accuracy?
My plan is to reduce the RC interconnection to a PI model, then use the method proposed in your Work A to calculate the effective capacitances under multiple voltage thresholds. After that, I will obtain the waveform at the driver end by looking up the table, and finally derive the receiver waveform through SPICE simulation. I wonder if this approach is feasible.
Thank you!