Building an IO buffer board

[hindenbugbite]

I'm interested in making an OSH board that will add adjustable IO voltage to the ESP32-S3 devkit. It would leverage the same buffer circuits the latest bus pirate uses. But before I move forward, I'm reviewing the pin assignments to find ways to consolidate some of the functions to the same pins to minimize the number of buffers and pins. Has there been any thoughts about this before I start from scratch?

The most common pin right now is CS on IO39. Most SPI based protocols are on the same pins. I2C mux seems limited based on the datasheet. UART might be able to connect in parallel with some gates.

[hindenbugbite]

It seems I miss the mux layers on the ESP32. I2C/I2S can be any GPIO using the GPIO matrix, while SPI goes through the higher speed IO mux, and the UART can be any GPIO when not used for programming. I think this makes it easier to consolidate to 8 buffered IOs.

[geo-tp]

currently we have already developed a similar solution which should soon be available for everyone, the idea is the same, an interface board for the esp32devkit with i/o voltage adjustments

[hindenbugbite]

That's great to hear! Will it be an OSH project? And will it be pin compatible to the current bus pirate so we can use the accessories? The 10 pin inline connector signal assignment of the BP5 actually translates well to the ESP32 since the open-drain signals are on separate pins. (unlike older BP3.x) I believe that BP5 uses the PIO to drive the 74LVC1T45 like an open-drain output, the ESP32 will need a different level shifter like the TXS0102. And since the ESP32 has more ADC inputs, it won't need any extra hardware to sample all I/O voltages.

[geo-tp]

Yes it should be an open source project, for the moment it has not been assembly/tested yet, here is the idea so that you understand better:

[fdufnews]

And since the ESP32 has more ADC inputs, it won't need any extra hardware to sample all I/O voltages.

This means you choose your I/O from GPIOs 1-10.
If you choose to use GPIOs 11-18, you will not get any voltage measurements when using webUI.
Otherwise, you can still connect 8 pins from GPIOs 1-10 to the GPIOs of your choice, but check that there is no risk of conflict during power-up.

[yashikada]

Yes it should be an open source project, for the moment it has not been assembly/tested yet

Have you a schema?
I'd like to build a circuit to test it out.

[AndreiVladescu]

Hello there!

I have been working for a while for the dock of the esp32 bus pirate, and I'd like to get a second opinion of it. The main thing that I am in doubt right now is the voltage translation circuit. My main aim is not to force the firmware to change by adding the same voltage translators that the official bus pirate 5 uses, so I used auto-direction finding voltage translators LSF0108.

If you have suggestions or questions, let me know.

[yashikada]

@AndreiVladescu Why use three LSF0108? Isn't one enough, and the input voltage is taken from the target circuit?
This way, all voltages within the chip's supported range are supported.
I used a TXS0108E, side A connected to the ESP32, and side B, which supports the 1.65-5.5V voltage range, connected to target.
It's perhaps a little slow, propagation is about 6ns against 1ns of LSF0108 but it works.

[fdufnews]

@yashikada using only one LSF0108 is problematic if if you want to have logic levels from 1.65V to 5V on the input and 3.3V on the ESP32 side. There is a constraint on the power supplies in the datasheet of the circuit

For proper operation, VCCA must always be at least 0.8 V less than VCCB

The datasheet offers a workaround to this problem. Unlike your method, it suggests connecting the B-side to the 3.3V circuit and the A-side to the unknokn voltage which can be in the 1.8 to 5V range.

[AndreiVladescu]

@yashikada @fdufnews is right, there is a need on regular auto-direction voltage translators that support both open-drain and push-pull configurations. I also wanted to use one LSF0108, but it has the Vref_B >= Vref_A limitation.

@fdufnews thank you, I didn't notice that for the LSF0108, I was looking at the Nexperia datasheet. I see that TI has a lot more documentation. However, it has some caveats, with the most problematic being Vref_B < Vref_A + 0.8V.

My solution right now is to use the double-pole,triple-position switch to switch between the target voltages, and to also enable/disable the LSF0108 ICs. The MOSFETs are used to facilitate the enabling logic, while also providing the visual cue with the LEDs.

If you would have further improvements or changes, they are welcome! We can also discuss more on discord, and I can share the schematics before they are released.

[fdufnews]

@AndreiVladescu

However, it has some caveats, with the most problematic being Vref_B < Vref_A + 0.8V.

Yes, but as said the TI datasheet offers a work around connecting V_REFA to V_REFB through a resistor divider. I have fast-read the datasheet so I may have missed some subtlety.

[AndreiVladescu]

Hello there! I've been reading up on the LSF0108 single supply translation, the one which @fdufnews mentioned. The solution looks really nice, but there is an equation which doesn't make this project feasible:

This was taken from https://www.ti.com/video/series/understanding-the-lsf-family-of-bidirectional--multi-voltage-lev.html.

The maximum data rate is severely limited by the pull up resistor, which ends up sinking a lot of current on the ESP32 S3 pins if taking a normal SPI frequency of 20MHz. This invalidates the LSF0108 approach.

If using the TXS0108E, as @yashikada mentioned, it looks as if the problem is solved, aside from the similar approach of using more chips daisy-chained together, to be able to switch between the lower Vref_A and the higher Vref_B. I think maybe 2 of them would suffice, with the 5V and 3.3V being on a separate chip to the 3.3V and 1.8V. But there is a problem with the maximum voltage at the I/O side of the TXS0108E, with the A0-A7 tolerating a maximum of 3.6V - if daisy chaining the two chips together it would mean there would exist an electrical connection between the 5V interface and the A0-A7 of the second (although disabled, in high-impedance mode).

One solution I found is to use a multiplexer to switch off and on the vulnerable line of the 3.3v/1.8v to 3.3v TXS0108E, such as the TMUX1574: https://www.ti.com/product/TMUX1574.

I am curious what you guys think, the TXS0108E seems like a good alternative if properly protected.

[Strykar]

@AndreiVladescu I am not an EE but Ti forums tell of SPI flakiness with the TXS0108E.
The TMUX1574 approach paves the way for all the electrical protection(s) and 5V tolerance a PCB for an ESP32 Bus Pirate should offer.

It should open the door, electrically speaking, for any 10-pin Bus Pirate 5+ adapter.
Any thoughts on a display with the boards laid out next to each other like that?

Beefy 3.3V / 5V rails would be lovely, I would buy one when released!