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| 1 | +/* |
| 2 | + * The MIT License (MIT) |
| 3 | + * |
| 4 | + * Copyright (c) 2021, Ha Thach (tinyusb.org) |
| 5 | + * |
| 6 | + * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | + * of this software and associated documentation files (the "Software"), to deal |
| 8 | + * in the Software without restriction, including without limitation the rights |
| 9 | + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 10 | + * copies of the Software, and to permit persons to whom the Software is |
| 11 | + * furnished to do so, subject to the following conditions: |
| 12 | + * |
| 13 | + * The above copyright notice and this permission notice shall be included in |
| 14 | + * all copies or substantial portions of the Software. |
| 15 | + * |
| 16 | + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 19 | + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | + * THE SOFTWARE. |
| 23 | + * |
| 24 | + * This file is part of the TinyUSB stack. |
| 25 | + */ |
| 26 | + |
| 27 | +/* metadata: |
| 28 | + name: STM32 H745 Discovery |
| 29 | + url: https://www.st.com/en/evaluation-tools/stm32h745i-disco.html |
| 30 | +*/ |
| 31 | + |
| 32 | +#ifndef BOARD_H_ |
| 33 | +#define BOARD_H_ |
| 34 | + |
| 35 | +#ifdef __cplusplus |
| 36 | + extern "C" { |
| 37 | +#endif |
| 38 | + |
| 39 | +// UART |
| 40 | +#define UART_DEV USART3 |
| 41 | +#define UART_CLK_EN __HAL_RCC_USART3_CLK_ENABLE |
| 42 | + |
| 43 | +// VBUS Sense detection |
| 44 | +#define OTG_FS_VBUS_SENSE 1 |
| 45 | +#define OTG_HS_VBUS_SENSE 0 |
| 46 | + |
| 47 | +// USB HS External PHY Pin: CLK, STP, DIR, NXT, D0-D7 |
| 48 | +#define ULPI_PINS \ |
| 49 | + {GPIOA, GPIO_PIN_3 }, {GPIOA, GPIO_PIN_5 }, {GPIOB, GPIO_PIN_0 }, {GPIOB, GPIO_PIN_1 }, \ |
| 50 | + {GPIOB, GPIO_PIN_5 }, {GPIOB, GPIO_PIN_10}, {GPIOB, GPIO_PIN_11}, {GPIOB, GPIO_PIN_12}, \ |
| 51 | + {GPIOB, GPIO_PIN_13}, {GPIOC, GPIO_PIN_0 }, {GPIOH, GPIO_PIN_4 }, {GPIOI, GPIO_PIN_11} |
| 52 | + |
| 53 | +#define PINID_LED 0 |
| 54 | +#define PINID_BUTTON 1 |
| 55 | +#define PINID_UART_TX 2 |
| 56 | +#define PINID_UART_RX 3 |
| 57 | + |
| 58 | +static board_pindef_t board_pindef[] = { |
| 59 | + { // LED |
| 60 | + .port = GPIOI, |
| 61 | + .pin_init = { .Pin = GPIO_PIN_12, .Mode = GPIO_MODE_OUTPUT_PP, .Pull = GPIO_PULLDOWN, .Speed = GPIO_SPEED_HIGH, .Alternate = 0 }, |
| 62 | + .active_state = 0 |
| 63 | + }, |
| 64 | + { // Button |
| 65 | + .port = GPIOC, |
| 66 | + .pin_init = { .Pin = GPIO_PIN_13, .Mode = GPIO_MODE_INPUT, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_HIGH, .Alternate = 0 }, |
| 67 | + .active_state = 1 |
| 68 | + }, |
| 69 | + { // UART TX |
| 70 | + .port = GPIOA, |
| 71 | + .pin_init = { .Pin = GPIO_PIN_9, .Mode = GPIO_MODE_AF_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_HIGH, .Alternate = GPIO_AF7_USART3 }, |
| 72 | + .active_state = 0 |
| 73 | + }, |
| 74 | + { // UART RX |
| 75 | + .port = GPIOA, |
| 76 | + .pin_init = { .Pin = GPIO_PIN_10, .Mode = GPIO_MODE_AF_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_HIGH, .Alternate = GPIO_AF7_USART3 }, |
| 77 | + .active_state = 0 |
| 78 | + } |
| 79 | +}; |
| 80 | + |
| 81 | +//--------------------------------------------------------------------+ |
| 82 | +// RCC Clock |
| 83 | +//--------------------------------------------------------------------+ |
| 84 | +static inline void SystemClock_Config(void) |
| 85 | +{ |
| 86 | + RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 }; |
| 87 | + RCC_OscInitTypeDef RCC_OscInitStruct = { 0 }; |
| 88 | + RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = { 0 }; |
| 89 | + |
| 90 | + /*!< Supply configuration update enable */ |
| 91 | + /* For STM32H750XB, use "HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);" */ |
| 92 | + HAL_PWREx_ConfigSupply(PWR_DIRECT_SMPS_SUPPLY); |
| 93 | + |
| 94 | + /* The voltage scaling allows optimizing the power consumption when the |
| 95 | + device is clocked below the maximum system frequency, to update the |
| 96 | + voltage scaling value regarding system frequency refer to product |
| 97 | + datasheet. */ |
| 98 | + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); |
| 99 | + |
| 100 | + while ((PWR->D3CR & (PWR_D3CR_VOSRDY)) != PWR_D3CR_VOSRDY) {} |
| 101 | + |
| 102 | + /* Enable HSE Oscillator and activate PLL with HSE as source */ |
| 103 | + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; |
| 104 | + RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; |
| 105 | + RCC_OscInitStruct.HSIState = RCC_HSI_OFF; |
| 106 | + RCC_OscInitStruct.CSIState = RCC_CSI_OFF; |
| 107 | + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; |
| 108 | + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; |
| 109 | + |
| 110 | + /* PLL1 for System Clock */ |
| 111 | + RCC_OscInitStruct.PLL.PLLM = 5; |
| 112 | + RCC_OscInitStruct.PLL.PLLN = 160; |
| 113 | + RCC_OscInitStruct.PLL.PLLFRACN = 0; |
| 114 | + RCC_OscInitStruct.PLL.PLLP = 2; |
| 115 | + RCC_OscInitStruct.PLL.PLLR = 2; |
| 116 | + RCC_OscInitStruct.PLL.PLLQ = 4; |
| 117 | + |
| 118 | + RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOMEDIUM; |
| 119 | + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2; |
| 120 | + HAL_RCC_OscConfig(&RCC_OscInitStruct); |
| 121 | + |
| 122 | + /* PLL3 for USB Clock */ |
| 123 | + PeriphClkInitStruct.PLL3.PLL3M = 25; |
| 124 | + PeriphClkInitStruct.PLL3.PLL3N = 336; |
| 125 | + PeriphClkInitStruct.PLL3.PLL3FRACN = 0; |
| 126 | + PeriphClkInitStruct.PLL3.PLL3P = 2; |
| 127 | + PeriphClkInitStruct.PLL3.PLL3R = 2; |
| 128 | + PeriphClkInitStruct.PLL3.PLL3Q = 7; |
| 129 | + |
| 130 | + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; |
| 131 | + PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL3; |
| 132 | + HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); |
| 133 | + |
| 134 | + /* Select PLL as system clock source and configure bus clocks dividers */ |
| 135 | + RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_PCLK1 | \ |
| 136 | + RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_D3PCLK1); |
| 137 | + |
| 138 | + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; |
| 139 | + RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1; |
| 140 | + RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2; |
| 141 | + RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2; |
| 142 | + RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2; |
| 143 | + RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV1; |
| 144 | + HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4); |
| 145 | + |
| 146 | + /*activate CSI clock mondatory for I/O Compensation Cell*/ |
| 147 | + __HAL_RCC_CSI_ENABLE() ; |
| 148 | + |
| 149 | + /* Enable SYSCFG clock mondatory for I/O Compensation Cell */ |
| 150 | + __HAL_RCC_SYSCFG_CLK_ENABLE() ; |
| 151 | + |
| 152 | + /* Enables the I/O Compensation Cell */ |
| 153 | + HAL_EnableCompensationCell(); |
| 154 | +} |
| 155 | + |
| 156 | +static inline void board_init2(void) { |
| 157 | + // For this board does nothing |
| 158 | +} |
| 159 | + |
| 160 | +void board_vbus_set(uint8_t rhport, bool state) { |
| 161 | + (void) rhport; |
| 162 | + (void) state; |
| 163 | +} |
| 164 | + |
| 165 | +#ifdef __cplusplus |
| 166 | + } |
| 167 | +#endif |
| 168 | + |
| 169 | +#endif |
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