The RESET_SR register of the Polarfire SoC is not 0x1FF after the chip is powered on (MSS Cold Reset).

[Zhaodi857]

Part: MPFS250T-1FCG1152I
Problem Description: We currently have 40 devices using this chip. Our program reads the RESET_SR register after the MSS is powered on or reset. Currently, two of the chips return values ​​of 0x1F7 and 0x1DF after power-on, while the remaining chips return 0x1FF. Both of these chips have experienced a mysterious freeze of the MSS at least once.
I would like to know the reason for the RESET_SR exception, and whether the current system freeze is related to the RESET_SR exception.