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paulsc96paulsc96
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hpdcache: Update PULP configurations
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3 files changed

+206
-11
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3 files changed

+206
-11
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‎Bender.yml‎

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -65,6 +65,10 @@ sources:
6565
files:
6666
- core/include/cv64a6_imafdchsclic_sv39_hpdcache_config_pkg.sv
6767

68+
- target: cv64a6_imafdchsclic_sv39_hpdcache_wb
69+
files:
70+
- core/include/cv64a6_imafdchsclic_sv39_hpdcache_wb_config_pkg.sv
71+
6872
- target: cv32a6_imac_sv0
6973
files:
7074
- core/include/cv32a6_imac_sv0_config_pkg.sv
@@ -95,12 +99,12 @@ sources:
9599
- core/cva6_accel_first_pass_decoder_stub.sv
96100

97101
# CLIC controller
98-
- target: any(cv64a6_imafdchsclic_sv39, cv64a6_imafdchsclic_sv39_hpdcache, cv64a6_imafdchsclic_sv39_wb)
102+
- target: any(cv64a6_imafdchsclic_sv39, cv64a6_imafdchsclic_sv39_hpdcache, cv64a6_imafdchsclic_sv39_hpdcache_wb, cv64a6_imafdchsclic_sv39_wb)
99103
files:
100104
- core/cva6_clic_controller.sv
101105

102106
# MMU
103-
- target: any(cv64a6_imafdcv_sv39, cv64a6_imafdc_sv39, cv64a6_imafdc_sv39_wb, cv64a6_imafdch_sv39, cv64a6_imafdc_sv39_hpdcache, cv64a6_imafdc_sv39_hpdcache_wb, cv64a6_imafdch_sv39_wb, cv64a6_imafdchsclic_sv39, cv64a6_imafdchsclic_sv39_wb, cv64a6_imafdchsclic_sv39_hpdcache, cv32a6_imac_sv0, cv32a6_imac_sv32, cv32a6_imafc_sv32)
107+
- target: any(cv64a6_imafdcv_sv39, cv64a6_imafdc_sv39, cv64a6_imafdc_sv39_wb, cv64a6_imafdch_sv39, cv64a6_imafdc_sv39_hpdcache, cv64a6_imafdc_sv39_hpdcache_wb, cv64a6_imafdch_sv39_wb, cv64a6_imafdchsclic_sv39, cv64a6_imafdchsclic_sv39_wb, cv64a6_imafdchsclic_sv39_hpdcache, cv64a6_imafdchsclic_sv39_hpdcache_wb, cv32a6_imac_sv0, cv32a6_imac_sv32, cv32a6_imafc_sv32)
104108
files:
105109
- core/cva6_mmu/cva6_tlb.sv
106110
- core/cva6_mmu/cva6_shared_tlb.sv

‎core/include/cv64a6_imafdchsclic_sv39_hpdcache_config_pkg.sv‎

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -26,14 +26,14 @@ package cva6_config_pkg;
2626
localparam CVA6ConfigF8En = 0;
2727
localparam CVA6ConfigFVecEn = 0;
2828

29-
localparam CVA6ConfigCvxifEn = 0;
29+
localparam CVA6ConfigCvxifEn = 1;
3030
localparam CVA6ConfigCExtEn = 1;
3131
localparam CVA6ConfigZcbExtEn = 1;
3232
localparam CVA6ConfigZcmpExtEn = 0;
3333
localparam CVA6ConfigAExtEn = 1;
34-
localparam CVA6ConfigHExtEn = 1;
35-
localparam CVA6ConfigBExtEn = 0;
34+
localparam CVA6ConfigBExtEn = 1;
3635
localparam CVA6ConfigVExtEn = 0;
36+
localparam CVA6ConfigHExtEn = 1;
3737
localparam CVA6ConfigRVZiCond = 1;
3838
localparam CVA6ConfigSclicExtEn = 1;
3939
localparam CVA6ConfigXhclicExtEn = 0;
@@ -78,7 +78,7 @@ package cva6_config_pkg;
7878

7979
localparam CVA6ConfigPerfCounterEn = 1;
8080

81-
localparam config_pkg::cache_type_t CVA6ConfigDcacheType = config_pkg::HPDCACHE;
81+
localparam config_pkg::cache_type_t CVA6ConfigDcacheType = config_pkg::HPDCACHE_WT;
8282

8383
localparam CVA6ConfigMmuPresent = 1;
8484

@@ -106,20 +106,20 @@ package cva6_config_pkg;
106106
XF8: bit'(CVA6ConfigF8En),
107107
RVA: bit'(CVA6ConfigAExtEn),
108108
RVB: bit'(CVA6ConfigBExtEn),
109-
ZKN: bit'(0),
109+
ZKN: bit'(1),
110110
RVV: bit'(CVA6ConfigVExtEn),
111111
RVC: bit'(CVA6ConfigCExtEn),
112112
RVH: bit'(CVA6ConfigHExtEn),
113113
RVZCB: bit'(CVA6ConfigZcbExtEn),
114-
RVZCMT: bit'(0),
115114
RVZCMP: bit'(CVA6ConfigZcmpExtEn),
115+
RVZCMT: bit'(0),
116116
RVSCLIC: bit'(CVA6ConfigSclicExtEn),
117117
RVXHCLIC: bit'(CVA6ConfigXhclicExtEn),
118118
XFVec: bit'(CVA6ConfigFVecEn),
119119
CvxifEn: bit'(CVA6ConfigCvxifEn),
120120
CoproType: config_pkg::COPRO_NONE,
121121
RVZiCond: bit'(CVA6ConfigRVZiCond),
122-
RVZiCbom: bit'(0),
122+
RVZiCbom: bit'(1),
123123
RVZicntr: bit'(1),
124124
RVZihpm: bit'(1),
125125
NrScoreboardEntries: unsigned'(CVA6ConfigNrScoreboardEntries),
@@ -169,9 +169,9 @@ package cva6_config_pkg;
169169
DcacheByteSize: unsigned'(CVA6ConfigDcacheByteSize),
170170
DcacheSetAssoc: unsigned'(CVA6ConfigDcacheSetAssoc),
171171
DcacheLineWidth: unsigned'(CVA6ConfigDcacheLineWidth),
172-
DcacheFlushOnFence: unsigned'(CVA6ConfigDcacheFlushOnFence),
172+
DcacheFlushOnFence: bit'(CVA6ConfigDcacheFlushOnFence),
173173
DcacheFlushOnFenceI: unsigned'(CVA6ConfigDcacheFlushOnFenceI),
174-
DcacheInvalidateOnFlush: unsigned'(CVA6ConfigDcacheInvalidateOnFlush),
174+
DcacheInvalidateOnFlush: bit'(CVA6ConfigDcacheInvalidateOnFlush),
175175
DataUserEn: unsigned'(CVA6ConfigDataUserEn),
176176
WtDcacheWbufDepth: int'(CVA6ConfigWtDcacheWbufDepth),
177177
FetchUserWidth: unsigned'(CVA6ConfigFetchUserWidth),

‎core/include/cv64a6_imafdchsclic_sv39_hpdcache_wb_config_pkg.sv‎

Lines changed: 191 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,191 @@
1+
// Copyright 2021 Thales DIS design services SAS
2+
//
3+
// Licensed under the Solderpad Hardware Licence, Version 2.0 (the "License");
4+
// you may not use this file except in compliance with the License.
5+
// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.0
6+
// You may obtain a copy of the License at https://solderpad.org/licenses/
7+
//
8+
// Original Author: Jean-Roch COULON - Thales
9+
//
10+
// Copyright 2023 Commissariat a l'Energie Atomique et aux Energies
11+
// Alternatives (CEA)
12+
//
13+
// Author: Cesar Fuguet - CEA
14+
// Date: August, 2023
15+
// Description: CVA6 configuration package using the HPDcache as cache subsystem
16+
17+
18+
package cva6_config_pkg;
19+
20+
localparam CVA6ConfigXlen = 64;
21+
22+
localparam CVA6ConfigRVF = 1;
23+
localparam CVA6ConfigRVD = 1;
24+
localparam CVA6ConfigF16En = 0;
25+
localparam CVA6ConfigF16AltEn = 0;
26+
localparam CVA6ConfigF8En = 0;
27+
localparam CVA6ConfigFVecEn = 0;
28+
29+
localparam CVA6ConfigCvxifEn = 1;
30+
localparam CVA6ConfigCExtEn = 1;
31+
localparam CVA6ConfigZcbExtEn = 1;
32+
localparam CVA6ConfigZcmpExtEn = 0;
33+
localparam CVA6ConfigAExtEn = 1;
34+
localparam CVA6ConfigBExtEn = 1;
35+
localparam CVA6ConfigVExtEn = 0;
36+
localparam CVA6ConfigHExtEn = 1;
37+
localparam CVA6ConfigRVZiCond = 1;
38+
localparam CVA6ConfigSclicExtEn = 1;
39+
localparam CVA6ConfigXhclicExtEn = 0;
40+
41+
localparam CVA6ConfigAxiIdWidth = 4;
42+
localparam CVA6ConfigAxiAddrWidth = 64;
43+
localparam CVA6ConfigAxiDataWidth = 64;
44+
localparam CVA6ConfigFetchUserEn = 0;
45+
localparam CVA6ConfigFetchUserWidth = CVA6ConfigXlen;
46+
localparam CVA6ConfigDataUserEn = 0;
47+
localparam CVA6ConfigDataUserWidth = 1;
48+
49+
localparam CVA6ConfigIcacheByteSize = 16384;
50+
localparam CVA6ConfigIcacheSetAssoc = 4;
51+
localparam CVA6ConfigIcacheLineWidth = 128;
52+
localparam CVA6ConfigDcacheByteSize = 32768;
53+
localparam CVA6ConfigDcacheSetAssoc = 8;
54+
localparam CVA6ConfigDcacheLineWidth = 128;
55+
// do not flush Dcache for EVERY fence - dramatic performance impact
56+
// use RVZiCbom to synchronize caches with DMA devices instead
57+
// CAUTION - a configuration with CVA6ConfigDcacheFlushOnFence might be required for different SoCs, e.g., cache-coherent SMP configurations
58+
localparam CVA6ConfigDcacheFlushOnFence = 1'b0;
59+
localparam CVA6ConfigDcacheFlushOnFenceI = 1'b1;
60+
localparam CVA6ConfigDcacheInvalidateOnFlush = 1'b0;
61+
62+
localparam CVA6ConfigDcacheIdWidth = 3;
63+
localparam CVA6ConfigMemTidWidth = CVA6ConfigAxiIdWidth;
64+
65+
localparam CVA6ConfigWtDcacheWbufDepth = 7;
66+
67+
localparam CVA6ConfigNrScoreboardEntries = 8;
68+
69+
localparam CVA6ConfigNrLoadPipeRegs = 1;
70+
localparam CVA6ConfigNrStorePipeRegs = 0;
71+
localparam CVA6ConfigNrLoadBufEntries = 8;
72+
73+
localparam CVA6ConfigRASDepth = 2;
74+
localparam CVA6ConfigBTBEntries = 32;
75+
localparam CVA6ConfigBHTEntries = 128;
76+
77+
localparam CVA6ConfigTvalEn = 1;
78+
79+
localparam CVA6ConfigNrPMPEntries = 8;
80+
81+
localparam CVA6ConfigPerfCounterEn = 1;
82+
83+
localparam config_pkg::cache_type_t CVA6ConfigDcacheType = config_pkg::HPDCACHE_WB;
84+
85+
localparam CVA6ConfigMmuPresent = 1;
86+
87+
localparam CVA6ConfigRvfiTrace = 1;
88+
89+
localparam config_pkg::cva6_user_cfg_t cva6_cfg = '{
90+
XLEN: unsigned'(CVA6ConfigXlen),
91+
VLEN: unsigned'(64),
92+
FpgaEn: bit'(0), // for Xilinx and Altera
93+
FpgaAlteraEn: bit'(0), // for Altera (only)
94+
TechnoCut: bit'(0),
95+
SuperscalarEn: bit'(0),
96+
ALUBypass: bit'(0),
97+
NrCommitPorts: unsigned'(2),
98+
AxiAddrWidth: unsigned'(CVA6ConfigAxiAddrWidth),
99+
AxiDataWidth: unsigned'(CVA6ConfigAxiDataWidth),
100+
AxiIdWidth: unsigned'(CVA6ConfigAxiIdWidth),
101+
AxiUserWidth: unsigned'(CVA6ConfigDataUserWidth),
102+
MemTidWidth: unsigned'(CVA6ConfigMemTidWidth),
103+
NrLoadBufEntries: unsigned'(CVA6ConfigNrLoadBufEntries),
104+
RVF: bit'(CVA6ConfigRVF),
105+
RVD: bit'(CVA6ConfigRVD),
106+
XF16: bit'(CVA6ConfigF16En),
107+
XF16ALT: bit'(CVA6ConfigF16AltEn),
108+
XF8: bit'(CVA6ConfigF8En),
109+
RVA: bit'(CVA6ConfigAExtEn),
110+
RVB: bit'(CVA6ConfigBExtEn),
111+
ZKN: bit'(1),
112+
RVV: bit'(CVA6ConfigVExtEn),
113+
RVC: bit'(CVA6ConfigCExtEn),
114+
RVH: bit'(CVA6ConfigHExtEn),
115+
RVZCB: bit'(CVA6ConfigZcbExtEn),
116+
RVZCMP: bit'(CVA6ConfigZcmpExtEn),
117+
RVZCMT: bit'(0),
118+
RVSCLIC: bit'(CVA6ConfigSclicExtEn),
119+
RVXHCLIC: bit'(CVA6ConfigXhclicExtEn),
120+
XFVec: bit'(CVA6ConfigFVecEn),
121+
CvxifEn: bit'(CVA6ConfigCvxifEn),
122+
CoproType: config_pkg::COPRO_NONE,
123+
RVZiCond: bit'(CVA6ConfigRVZiCond),
124+
RVZiCbom: bit'(1),
125+
RVZicntr: bit'(1),
126+
RVZihpm: bit'(1),
127+
NrScoreboardEntries: unsigned'(CVA6ConfigNrScoreboardEntries),
128+
PerfCounterEn: bit'(CVA6ConfigPerfCounterEn),
129+
MmuPresent: bit'(CVA6ConfigMmuPresent),
130+
RVS: bit'(1),
131+
RVU: bit'(1),
132+
SoftwareInterruptEn: bit'(1),
133+
HaltAddress: 64'h800,
134+
ExceptionAddress: 64'h808,
135+
RASDepth: unsigned'(CVA6ConfigRASDepth),
136+
BTBEntries: unsigned'(CVA6ConfigBTBEntries),
137+
BPType: config_pkg::BHT,
138+
BHTEntries: unsigned'(CVA6ConfigBHTEntries),
139+
BHTHist: unsigned'(3),
140+
DmBaseAddress: 64'h0,
141+
TvalEn: bit'(CVA6ConfigTvalEn),
142+
DirectVecOnly: bit'(0),
143+
NrPMPEntries: unsigned'(CVA6ConfigNrPMPEntries),
144+
PMPCfgRstVal: {64{64'h0}},
145+
PMPAddrRstVal: {64{64'h0}},
146+
PMPEntryReadOnly: 64'd0,
147+
PMPNapotEn: bit'(1),
148+
NOCType: config_pkg::NOC_TYPE_AXI4_ATOP,
149+
CLICNumInterruptSrc: unsigned'(256),
150+
NrNonIdempotentRules: unsigned'(2),
151+
NonIdempotentAddrBase: 1024'({64'b0, 64'b0}),
152+
NonIdempotentLength: 1024'({64'b0, 64'b0}),
153+
NrExecuteRegionRules: unsigned'(3),
154+
ExecuteRegionAddrBase: 1024'({64'h8000_0000, 64'h1_0000, 64'h0}),
155+
ExecuteRegionLength: 1024'({64'h40000000, 64'h10000, 64'h1000}),
156+
NrCachedRegionRules: unsigned'(1),
157+
CachedRegionAddrBase: 1024'({64'h8000_0000}),
158+
CachedRegionLength: 1024'({64'h40000000}),
159+
MaxOutstandingStores: unsigned'(7),
160+
DebugEn: bit'(1),
161+
SDTRIG: bit'(0),
162+
Mcontrol6: bit'(0),
163+
Icount: bit'(0),
164+
Etrigger: bit'(0),
165+
Itrigger: bit'(0),
166+
AxiBurstWriteEn: bit'(0),
167+
IcacheByteSize: unsigned'(CVA6ConfigIcacheByteSize),
168+
IcacheSetAssoc: unsigned'(CVA6ConfigIcacheSetAssoc),
169+
IcacheLineWidth: unsigned'(CVA6ConfigIcacheLineWidth),
170+
DCacheType: CVA6ConfigDcacheType,
171+
DcacheByteSize: unsigned'(CVA6ConfigDcacheByteSize),
172+
DcacheSetAssoc: unsigned'(CVA6ConfigDcacheSetAssoc),
173+
DcacheLineWidth: unsigned'(CVA6ConfigDcacheLineWidth),
174+
DcacheFlushOnFence: bit'(CVA6ConfigDcacheFlushOnFence),
175+
DcacheFlushOnFenceI: unsigned'(CVA6ConfigDcacheFlushOnFenceI),
176+
DcacheInvalidateOnFlush: bit'(CVA6ConfigDcacheInvalidateOnFlush),
177+
DataUserEn: unsigned'(CVA6ConfigDataUserEn),
178+
WtDcacheWbufDepth: int'(CVA6ConfigWtDcacheWbufDepth),
179+
FetchUserWidth: unsigned'(CVA6ConfigFetchUserWidth),
180+
FetchUserEn: unsigned'(CVA6ConfigFetchUserEn),
181+
InstrTlbEntries: int'(16),
182+
DataTlbEntries: int'(16),
183+
UseSharedTlb: bit'(0),
184+
SvnapotEn: bit'(0),
185+
SharedTlbDepth: int'(64),
186+
NrLoadPipeRegs: int'(CVA6ConfigNrLoadPipeRegs),
187+
NrStorePipeRegs: int'(CVA6ConfigNrStorePipeRegs),
188+
DcacheIdWidth: int'(CVA6ConfigDcacheIdWidth)
189+
};
190+
191+
endpackage

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