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1. Dual-Core-MIPS32-Processor-with-Memory-Arbiter Dual-Core-MIPS32-Processor-with-Memory-Arbiter Public

   Extension of Single cycle Mips32 processor. Implemeneted two Cores with a shared RAM module using a memory arbiter. Used stalling to avoid data corruption

   Verilog

2. SystemVerilog_Practise SystemVerilog_Practise Public

   SV Practise/Learning

   SystemVerilog 1

3. Internship_Project_APB_Interfaced_SPI_Master_core Internship_Project_APB_Interfaced_SPI_Master_core Public

   Maven Silicon Design Internship Proejct

   Verilog 3

4. SV_mini_projects SV_mini_projects Public

   repo for SystemVerilog mini projects

   SystemVerilog

5. RTL_Single-Cycle-MIPS32-Processor RTL_Single-Cycle-MIPS32-Processor Public

   Single Cycle MIPS32 processor RISC ISA. Modified the Architecture to support Jump Instructions

   Verilog

6. Python_MiniProjects Python_MiniProjects Public

   Python