This repository is my offering of a Motorola MC68000 (and family) design for RCBus.
- The RCBus
- Zilog Compatability
- The Boards
- Address Map
- Testing
- RCBus Compatability
- Software Development
- Hardware Library
- Component Sourcing
* These boards are either under development or going through basic testing. Once I'm confident in the board operation, I will put the design files into the boards folder.
RCBus is an extended version of the RC2014™ bus that was put together by members of the retro-comp google group. The latest RCBus specification as of Oct 2025 is v1.0 and can be found here.
My boards are designed around the RCBus 80 pin format in order to support the additional address and data signals.
There is no intention to support any Zilog specific chips such as the PIO, SIO, CTC or KIO as their signals and timing are just too different. The PIO and SIO have equivalents in the MC68230 and MC68681 chips. The KIO has a sort-of equivalent in the MC68901. A CTC chip may not be needed as the MC68230 and MC68681 have their own timers and the MC68901 has 4 simple timers.
The boards below are my current suite of MC68xxx processors and peripherals. There are no surface mount devices or programable logic devices (PALs, GALs, CPLDs etc) in my design. The only programmable devices are the 2 EEPROMs containing my own simple monitor program and optionally CP/M-68K v1.3 and EhBASIC.
The board dimensions should be the size of an RCBus "medium" module as detailed in the RCBus specification v1.0 - roughly 4in x 2.1in excluding the edge connector. All the boards are 4-layer boards with +5V and GND on the inner 2 layers.
There are more details of each board in the boards folder.
This board consists of a PLCC packaged MC68000 processor, bits of glue logic and the processor clock source. The glue logic handles autovector interrupts, generates the /BERR signal and provides the /DTACK signal for the RCBus MREQ and IORQ address spaces as well as the the RCBus /MREQ, /IORQ, /RD & /WR signals.
Devices that are addressed outside of the RCBus MREQ and IORQ address range must supply their own /DTACK signal.
This board consists of a 132-pin PGA packaged MC68302 processor, bits of glue logic and the processor clock source. The glue logic primarily generates the RCBus /MREQ, /IORQ, /RD & /WR signals. The board features 2 serial ports and an SPI port as well as autovector interrupts.
A /DTACK generator is not required as the MC68302 has internal logic to automatically generate a /DTACK for any address within the address rance of each of its 4 chip select signals.
Similarly, a /BERR generator is not required as the MC68302 has an internal hardware watchdog timer that is enabled at reset and will generate a Bus Error if a /DTACK isn't generated by the internal chip select logic or an external device.
This board consists of a pair of 40-pin DIL MC68681 serial I/O chips and associated address decode logic as well as a crystal oscillator for the baud rate generators. This combination provides four serial ports, two 16-bit timer/counters as well as 16 digital outputs and 12 digital inputs.
Please read the SIO board documentation as it details which of the alternative DUARTs are compatible with my SIO board.
This board consists of a pair of 48-pin DIL MC68230 parallel I/O chips and associated address decode logic. This combination provides 32 individually programmable digital I/O pins with up to 16 additional digital I/O pins depending on the port C functionality required and two 24-bit timer/counters.
This board consists of a pair of 48-pin DIL MC68901 multifunction chips and associated address decode logic. This combination provides 16 individually programmable digital I/O pins, eight 8-bit timers and two serial ports.
This ROM/RAM board is designed for two Winbond W27C512 EEPROMs to provide 128K of non-volatile memory organised as 64K of 16-bit wide memory and two Alliance Memory AS6C4008 RAM chips to provide 1M of volatile memory organised as 512K of 16-bit wide memory. The board also includes address decode logic and a simple /DTACK generator.
This ROM/RAM board is designed for two SST39SF040 FLASH memory chips to provide 1M of non-volatile memory organised as 512K of 16-bit wide memory and two Alliance Memory AS6C4008 RAM chips to provide 1M of volatile memory organised as 512K of 16-bit wide memory. The board also includes address decode logic and a simple /DTACK generator.
By reconfiguring the boards jumpers, the board will support four SST39SF040 FLASH memory chips to provide 2M of non-volatile memory organised as 1M of 16-bit wide memory or four Alliance Memory AS6C4008 RAM chips to provide 2M of volatile memory organised as 1M of 16-bit wide memory.
This is a hybrid bit-bang SPI master board. It's a hybrid design as the serial to parallel and parallel to serial conversions are both done in hardware. The only bit-bang element is the pulses required to generate the SPI clock signal.
The board supports 6 SPI connections - three are 5v SPI and three are 3v3 SPI - along with a 5v to 3v3 regulator.
This board is my attempt to make a 68000 equivalent of Steve Cousins Z80 SC110 board which consists of a Z80 SIO/2 serial chip and a Z80 CTC counter timer chip. By combining an MC68681 DUART with an MC68901 MFP I managed to achieve a similar board, but with a bit more functionality - mainly due to the MC68901.
The board provides 3 serial ports, 8 digital i/o pins, 8 digital outputs, 6 digital inputs, a 16-bit timer and four 8-bit timers and I've given it the acronym LBE1 for Little Bit of Everything #1.
This board provides 2 serial ports using an SCC68692 DUART and an MC68881 (or MC68882) maths co-processor board configured as a peripheral device to the MC68000 processor.
The current address map is as follows:
| Address Range | Device | Notes |
|---|---|---|
| 0x000000..0x01FFFF | EEPROM | Fixed address range1 |
| 0x100000..0x1FFFFF | SRAM | Fixed address range1 |
| 0x000000..0x5FFFFF | FLASH | Jumper selectable address range2 |
| 0x000000..0x5FFFFF | SRAM | Jumper selectable address range2 |
| 0xD00000..0xD03FFF | DUARTs | Jumper selectable address range 5 |
| 0xD00000..0xD03FFF | LBE | Jumper selectable address range 5 |
| 0xD00000..0xD03FFF | DUART + MATH | Jumper selectable address range 5 |
| 0xD08000..0xD0BFFF | PI/Ts | Jumper selectable address range |
| 0xD10000..0xD13FFF | MFPs | Jumper selectable address range |
| 0xD20000..0xD23FFF | SPI | Fixed address range |
| 0xF00000..0xF7FFFF | RCBus /MREQ | Fixed address range3 - partially decoded |
| 0xF80000..0xFFFFFF | RCBus /IORQ | Fixed address range3 - partially decoded |
| 0xFC0000..0xFCFFFF | RCBus /MREQ | Fixed address range4 |
| 0xFD0000..0xFDFFFF | RCBus /IORQ | Fixed address range4 - partially decoded |
- These addresses apply to the ROM/RAM V1 board
- These addresses apply to the ROM/RAM V2 board
- These addresses apply to the MC68000 board
- These addresses apply to the MC68302 board
- These boards share the same address range so that the same monitor code can be used with the MC68681 DUARTs on each of the boards.
The 68000 board, the ROM/RAM v1 board, the serial I/O board and the MFP board are working and a small monitor program is running that allows me to download Motorola S-records. Both S2 (16-bit) & S3 (24-bit) record types are handled although in reality only S3 records make sense with the current memory configuration.
The 68302 board has a version of my small monitor program running on it with the main serial I/O via SCC1.
The ROM/RAM V2 board has been assembled but remains untested.
The 68230 board has had some issues relating to how the chip select signal is generated. A simple wiring change appears to have resolved this.
The monitor currently supports a few of the EASy68K TRAP #15 text I/O functions - currently just tasks 0, 1, 5, 6, 13 & 14 - which are all related to text input/output. Further tasks may be added as I need them.
I have a number of Steve Cousin's RC2014™ / RCBus boards that I have been able to use successfully in the 68000 system. The code folder holds some example code for these boards as well as CP/M-68K v1.3 using the CompactFlash storage.
| Name | Description |
|---|---|
| SC129 | digital I/O module |
| SC145 | CompactFlash module |
| SC611 | MicroSD module |
| SC704 | I2C bus master module |
| SC406 | I2C temperature sensor module |
| SC705 | serial ACIA module |
| SC729 | CompactFlash module |
The SC145 & SC729 CompactFlash modules have both been tested with CP/M-68K v1.3 and appear to operate correctly.
I've ported part of J B Langston's TMS9918A code to work with Shiela Dixon's TMSEMU RCBus video card. There are now several demos working as I've slowly added more functionality to the TMS library. Some demos have also been ported from assembler to C along with modifications to the library to support C function calls.
I've also had success in porting some of Dean Netherton's HDMI for RC (V9958A) demonstration code. There are now several demos working as I've slowly explored his Tang Nano 20K FPGA emulation of a V9958A chip.
All of the early software - i.e. the monitor program - was developed and initially tested using EASy68K & SIM68K under Windows 10.
I've now moved my development across to a Linux Mint system and discovered that EASy68K doesn't particularly like running under WINE. Luckily I still have a Windows 10 PC available.
I've now switched to using GCC v15.2.0 to compile my C and C++ programs.
Unfortunately I've had little success in building Newlib or similar libraries to create a libc for my system. This is purely down to my lack of experience / understanding of the configuration and build process. I've therefore resorted to rolling my own libc using the code detailed in The Standard C Library by P.J.Plauger as a starting point.
I've managed to correctly configure the objdump tool to generate an assembler listing file that can then be modified by the Linux SED command such that SIM68K will accept the file and I can debug C++ code running on SIM68K.
I'm not a C++ programmer so I figured I would try and learn about C++ and classes and decided to throw myself in at the deep end - the really deep end!
Having returned to the world of microcontrollers by playing around with some Arduino UNO boards, I figured that I might try and create some hardware libraries in the style of Arduino.
Currently I have a serial port library that provides similar functionality to some of the functions in the Arduino Serial class that supports the dual MC68681 SIO board.
Whilst many of the TTL logic devices are generally still available as NOS (New Old Stock), almost all the larger chips (CPUs, DUARTS etc) are now obsolete and can be difficult to locate. Here in the UK my sources are either Silicon Ark or ebay.
I've also used AliExpress but a note of caution. It has been my experience that quite a few sellers on AliExpress are claiming that their chips are new devices. In reality these devices have most likely been reclaimed from old scrapped boards and have solder on their pins. My experience with these devices is that they do work as they should but the presence of the solder makes their pins 'sticky'. After several insertions and removals, either the IC socket breaks or a pin breaks off the device. For me, this was particually the case when using EEPROM or FLASH devices and going through the early burn and learn programming process.