S3LC01

Full collection for learning logic circuits based on Logical Circuits course at Amirkabir University of Tehran.

Name		Name	Last commit message	Last commit date
Latest commit History 65 Commits
00.Boolean Algebra		00.Boolean Algebra
00.Logic Gates		00.Logic Gates
00.Pos & Sop		00.Pos & Sop
00.Truth Table		00.Truth Table
01.HDL		01.HDL
02.Karnaugh Map		02.Karnaugh Map
03.Global Gates		03.Global Gates
04.Delays		04.Delays
05.Building Blocks ( Verilog )		05.Building Blocks ( Verilog )
06.Decoder & Encoder		06.Decoder & Encoder
07.Mux		07.Mux
08.Numbers		08.Numbers
09.Arithmetics		09.Arithmetics
11.Verilog 1		11.Verilog 1
12.Numbers 2		12.Numbers 2
13.Arithmetics 2		13.Arithmetics 2
14.Verilog 2		14.Verilog 2
15.Sequential Circuits		15.Sequential Circuits
16.FlipFlops		16.FlipFlops
17.Sequential Circuits Analyse		17.Sequential Circuits Analyse
18.State Diagram		18.State Diagram
19.Signal Tracing in Sequential Circuits		19.Signal Tracing in Sequential Circuits
20.Equalize		20.Equalize
21.Registers and Counters		21.Registers and Counters
22.Hazard		22.Hazard
23.PLA and PAL		23.PLA and PAL
24.Memory		24.Memory
README.md		README.md

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