An open-source agentic pipeline that turns a natural-language hardware description into a manufacturable PCB. The system automates:
- Requirement β Component selection (BOM)
- Datasheet retrieval β Footprint extraction β Footprint generation (.kicad_mod)
- Schematic synthesis (netlist) from component reference designs and constraints
- PCB placement and routing (via KiCad + Freerouting or vendor tools adapters)
- Gerber generation via EDA tool backends (KiCad first-class; adapters for Altium/Cadence planned)
Status: early scaffold. Includes a working, parametric KiCad footprint generator for common packages and an extensible pipeline with clear interfaces for each step.
- Speed up concept-to-board by automating tedious steps.
- Keep humans-in-the-loop for safety while leveraging LLMs/CV for datasheet understanding.
- Vendor-neutral core with adapters for popular EDA tools.
- Core config + logging
- Pluggable LLM providers (OpenAI/Ollama/etc.)
- Steps:
- requirements_parser β bom_generator β datasheet_fetcher β footprint_generator β schematic_synthesizer β pcb_router β gerber_exporter
- Backends:
- KiCad backend (first-class, CLI-friendly)
- Adapters for Altium (COM/Script/PDN) and Cadence Allegro (SKILL/CLI) planned
pcb-designer-ai-agent/
ββ README.md
ββ LICENSE
ββ pyproject.toml
ββ .gitignore
ββ src/pcbai/
β ββ __init__.py
β ββ core/
β β ββ config.py
β β ββ logger.py
β ββ llm/
β β ββ provider.py
β β ββ providers/
β ββ steps/
β β ββ requirements_parser.py
β β ββ bom_generator.py
β β ββ datasheet_fetcher.py
β β ββ footprint_generator.py <-- working generator for SMD R/C and SOIC
β β ββ schematic_synthesizer.py
β β ββ pcb_router.py
β β ββ gerber_exporter.py
β ββ pipeline/
β ββ cli.py
ββ tests/
ββ test_footprint_generator.py
- Python 3.10+
- KiCad 7/8 recommended for future steps (not required to try the footprint generator)
Install:
pip install -e .Generate a 0603 resistor footprint:
pcbai footprint --type smd_rc --name R_0603 --body-l 1.6 --body-w 0.8 --pad-l 0.9 --pad-w 0.8 --gap 0.8 --out build/Generate a 14-pin SOIC footprint:
pcbai footprint --type soic --name SOIC-14_3.9x8.7mm_P1.27mm \
--pins 14 --pitch 1.27 --body-l 8.7 --body-w 3.9 --pad-l 1.5 --pad-w 0.6 --row-offset 2.3 --out build/You will find .kicad_mod files in build/ to drop into a KiCad library.
- Planned: PDF/image β text/structured extraction using OCR + LLM-Vision to infer package params when IPC tables are present.
- Today: you can provide measured params directly to the generator.
- Planned: SKiDL-based netlist generation from component set + reference circuits.
- Planned: KiCad pcbnew and Freerouting integration;
kicad-clifor Gerbers. - Adapters for Altium/Cadence will require respective licensed tool installations and API keys.
- All runtime config via environment variables or a YAML file, see
src/pcbai/core/config.py.
- PRs welcome. Focus areas:
- Datasheet parsers and CV feature extractors
- More package generators (QFN/QFP/BGA)
- SKiDL schematic templates
- EDA tool adapters
Dual-licensed:
- Non-commercial, open-source use granted under the Custom License in LICENSE.
- Commercial/enterprise use requires prior written authorization from the author. Contact: assalas@tutamail.com.