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@bugadani bugadani marked this pull request as ready for review February 12, 2026 06:30
Copilot AI review requested due to automatic review settings February 12, 2026 06:30
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Pull request overview

Enables/advertises DMA support for the ESP32-C5 across the esp-hal stack by updating device metadata, generated cfgs/peripheral singletons, and adding GDMA v2 register access + initialization hooks needed for C5 DMA usage.

Changes:

  • Mark ESP32-C5 DMA as partially supported in metadata, add virtual DMA channel peripherals, and enable SPI master DMA capability.
  • Extend esp-hal DMA/GDMA implementation to support gdma_version = 2 (new ahb_v2 backend) and allow channel splitting on ESP32-C5.
  • Adjust early init on ESP32-C5 to relax TEE security restrictions so DMA can access memory, and update HIL test cfg selection for mem2mem.

Reviewed changes

Copilot reviewed 11 out of 12 changed files in this pull request and generated 3 comments.

Show a summary per file
File Description
hil-test/src/bin/misc_non_drivers/dma_mem2mem.rs Switch mem2mem selection to soc_has_mem2mem1 cfg for broader chip coverage.
esp-metadata/devices/esp32c5.toml Declare partial DMA support, add virtual DMA channels, and enable SPI master DMA.
esp-metadata-generated/src/_generated_esp32c5.rs Regenerate properties and peripheral singleton lists (DMA_CH0..2, SPI DMA flag).
esp-metadata-generated/src/_build_script_utils.rs Emit cfgs for DMA channel presence, DMA driver support, and SPI master DMA support.
esp-hal/src/soc/esp32c5/mod.rs Add ESP32-C5 pre-init workaround to reset TEE security modes for DMA access.
esp-hal/src/dma/mod.rs Allow safe channel splitting on ESP32-C5; tighten some DMA API cfg gating.
esp-hal/src/dma/gdma/mod.rs Add gdma_version = 2 backend selection and call backend setup() during init.
esp-hal/src/dma/gdma/ahb_v2.rs New GDMA v2 register access implementation + setup of allowed memory range.
esp-hal/src/dma/gdma/ahb_v1.rs Add no-op setup() to match v2 initialization hook.
esp-hal/README.md Update capability table to show DMA available on ESP32-C5.
esp-hal/Cargo.toml Bump esp32c5 PAC git revision to match required register layout.

@bugadani bugadani force-pushed the c5-dma branch 2 times, most recently from e021d7b to eec29b2 Compare February 12, 2026 13:36
Copilot AI review requested due to automatic review settings February 12, 2026 13:36
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Pull request overview

Copilot reviewed 11 out of 12 changed files in this pull request and generated 1 comment.

@MabezDev
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/hil esp32c5

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github-actions bot commented Feb 12, 2026

Triggered HIL run for #4959 (chips: esp32c5).

Run: https://github.com/esp-rs/esp-hal/actions/runs/21951065508

Status update: ✅ HIL (per-chip) run succeeded.

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LGTM with a few nits, thanks!

Copilot AI review requested due to automatic review settings February 12, 2026 15:02
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Pull request overview

Copilot reviewed 11 out of 12 changed files in this pull request and generated 3 comments.

@bugadani bugadani enabled auto-merge February 12, 2026 15:21
@bugadani bugadani added this pull request to the merge queue Feb 12, 2026
Merged via the queue into esp-rs:main with commit c8080c3 Feb 12, 2026
54 of 55 checks passed
@bugadani bugadani deleted the c5-dma branch February 12, 2026 16:09
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2 participants