[SYCL] atomic_memory_order_capabilities query for device and context#8517
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AlexeySachkov merged 28 commits intointel:syclfrom Mar 23, 2023
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February 28, 2023 07:07
This satsifies llvm-test-suite/SYCL/AtomicRef/atomic-memory-order.cpp if you remove the "UNSUPPORTED OpenCL" test line, but doesn't implement the other capabilities this could return. Further discussion is required for further work to continue.
Minimal implementaton for now that calls similar query for each device and combines them. Currently checks for memory_order::relaxed, others coming soon.
AlexeySachkov
previously requested changes
Mar 2, 2023
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March 8, 2023 08:45
Covering all current OpenCL versions
Return full set of them as in OCL 2.x
Instead of resolving it as its own plugin call with PI code, just call the related one for each of its devices and intersect the results together.
added 2 commits
March 9, 2023 05:13
Unsure whether ACQUIRE and RELEASE need removing as current pi.h expects 5 bits for memory order info but the OCL headers say only 3 are necessary in 3.0 as the values are RELAXED, ACQ_REL, and SEQ_CST.
ACQ_REL infers ACQUIRE and RELEASE, so adding them to the return value.
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This will need to wait for #8595 to be merged first to resolve potential merge conflicts. |
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March 10, 2023 08:00
Moved mask location, added bitwise operations to convert CL to PI enum values, masked off relevant bits, and improved handling of out parameters.
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March 14, 2023 08:04
…om/andylshort/llvm into alamzeds/atomic_mem_order_caps_fix
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March 16, 2023 05:07
steffenlarsen
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Mar 21, 2023
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Sorry for the delay. LGTM!
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I'm just testing a patch that addresses this comment from #8586 (comment) as there now are UR equivalents of the PI flags I needed, so just need to hold fire on the merge for a short while. |
My comments were resolved, dismissing that review
veselypeta
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Sep 21, 2023
…ntel#8517) This patch implements the `atomic_memory_order_capabilities` query in the OpenCL and Level Zero backends/plugins for `device` and `context` Specifically: - OpenCL <2.0 returns the minimum required capability set (`relaxed`) defined in [Section 4.2 of the OpenCL 3.0 specification](https://registry.khronos.org/OpenCL/specs/3.0-unified/html/OpenCL_API.html#CL_DEVICE_ATOMIC_MEMORY_CAPABILITIES). - OpenCL <3.0 and Level Zero backends return all memory order capabilities. - OpenCL >=3.0 queries the actual device to get the supported memory order capabilities. E2E test have also been updated to reflect these changes: intel/llvm-test-suite#1627
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This patch implements the
atomic_memory_order_capabilitiesquery in the OpenCL and Level Zero backends/plugins fordeviceandcontextSpecifically:
relaxed) defined in Section 4.2 of the OpenCL 3.0 specification.E2E test have also been updated to reflect these changes: intel/llvm-test-suite#1627