The "OTTER", or my RISC-V 32-bit Processor made from scratch. The project implements the entire RISC-V 32I instruction set highlighted in the OTR Assembler Manual below. A block diagram of the entire processor has been attached below.
https://www.youtube.com/watch?v=jTHeDDsXRnQ https://www.youtube.com/watch?v=nBnOtG2A2Pc https://www.youtube.com/@slogary95/videos https://www.youtube.com/watch?v=MFT4VrD1bsg file:///C:/Users/jerem/Downloads/OTR_architecture_2_01.pdf file:///C:/Users/jerem/Downloads/OTR_Assembler_Manual_1_01.pdf