SAP-1 in Verilog and Logisim
| Mnemonic | Binary | Description |
|---|---|---|
| LDA | 1011 | Load accumulator with the value of the RAM at the address of the lower 4 bits |
| OUT | 0000 | Outputs the result to the output register |
| HLT | 0100 | Halts the Processor |
| ADD | 0101 | Adds the value of the accumulator to the value of the RAM at the address of the lower 4 bits |
| SUB | 0101 | Subtracts the value of the RAM at the address of the lower 4 bits from the accumulator |
