Add workaround for slow JTAG on Sipeed Console#623
Open
gatecat wants to merge 1 commit intotrabucayre:masterfrom
Open
Add workaround for slow JTAG on Sipeed Console#623gatecat wants to merge 1 commit intotrabucayre:masterfrom
gatecat wants to merge 1 commit intotrabucayre:masterfrom
Conversation
Signed-off-by: gatecat <gatecat@ds0.me>
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
1 participant
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
Not sure if I implemented this in the neatest way possible, but at least the logic is here ^^
The MCU on the Sipeed Console apparently has a bug where LSB first mode is incredibly slow (eventually found by comparing wireshark traces between gowin programmer and openfpgaloader). Before this patch it was taking about 4 minutes to program the SRAM of the 138k, with this patch it takes 14 seconds...