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@5iri 5iri commented Feb 2, 2026

This pull request significantly enhances the LLHD "Deseq" transformation to support projected clocks—cases where a single-bit clock is extracted from a multi-bit bus (such as comb.extract %bus from N). The changes introduce a new ValueField abstraction to accurately track and reason about subfields of values, enabling the pass to identify and rematerialize extracted clock bits outside of processes. This improves support for hardware designs that use bus projections as clocks and fixes previous limitations in the analysis and lowering pipeline.

Key changes include:

Support for Projected Clocks and Value Subfields:

  • Introduced the ValueField struct in DeseqUtils.h to represent a value and a subfield (via HW field ID), along with DenseMap support for use as a key. This enables precise tracking of projections such as struct fields, array elements, and extracted bits. [1] [2]
  • Implemented the getValueField helper and related logic in Deseq.cpp to analyze and canonicalize projections, allowing the pass to recognize when a trigger is a subfield of an observed value.

Process Analysis and Trigger Handling:

  • Updated process analysis to support both traditional i1 observed values and projected clocks, collecting triggers from either direct i1 values or projections (e.g., extracted bits) of observed buses.
  • Adjusted the seeding and propagation of analysis lattices (booleanLattice, valueLattice) to use ValueField as the key, ensuring correct handling of projections throughout the analysis. [1] [2] [3] [4] [5] [6] [7]

Code Generation Improvements:

  • Modified register implementation to rematerialize extracted clock bits outside the process region when needed, ensuring the generated hardware matches the intended clocking scheme for projected clocks.

Testing Enhancements:

  • Added comprehensive tests for projected clock extraction from buses (both posedge and negedge cases) in deseq.mlir, verifying that the pass correctly identifies and rematerializes extracted clock bits.

These improvements make the Deseq pass more robust and capable of handling a wider range of hardware descriptions, particularly those using clock projections from buses.

@5iri 5iri marked this pull request as ready for review February 2, 2026 10:01
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5iri commented Feb 2, 2026

this fixes part 2 as stated in #9481

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